Programming Parallel Accelerators at the \

Parallel accelerators like FPGAs and GPUs have been shown to provide huge performance and energy efficiency advantages on a wide range of applications, from video coding to scientific simulation to wireless communication. However, accelerators are still harder to program than conventional processors, which is almost certainly limiting their use. I advocate for "C level" programming of accelerators, and in this talk I will describe several projects I have worked on to enable that. Specifically, I will discuss a new approach to pipelining complex loops, probabilistic auto-tuning, and relaxed I/O ordering operational semantics.

Ben Ylvisaker is almost finished being a graduate student at the University of Washington. There he is advised by Carl Ebeling and Scott Hauck, and works in the Mosaic group, which does research on architectures, tools and applications for parallel accelerators. Before coming to UW, he earned a master's degree at Carnegie Mellon, where he also got an undergrad degree a few years earlier. Interspersed between the academic adventures, Ben has worked at a number of startup companies, none of which exist anymore.