Due by 5 PM, Monday Dec. 9, 1996
1. (15 points) Using the information in the handout, draw a picture of the R10000 TLB and Primary Data Cache at about the level of detail of Figure 7.24 from the textbook. Be sure to label and specify the widths of all fields. Assume a page size of 16 Kbytes. If there's something you can't figure out from the documents, make (and write down) some reasonable assumption. Ignore the ``switch'' shown in the documents' block diagrams, and never mind about the Address Queue. Also, be careful not to over-interpret the block diagrams, which abstract away the virtual indexing of the cache.
2. (15 points) (Chapter 9 reading required.) Parallel systems usually show performance increases as you increase the number of processors, with the ideal being n times speedup for n processors. Please invent a small ``benchmark'' that runs slower if you add more processors. That is, the execution time of your benchmark should have some inverse relationship to the number of processors. Assume the system is a single-bus, shared-memory MIMD computer. No cheap tricks allowed, like inserting artificial delays that depend on n. Your benchmark should actually compute something meaningful, and it should display the slowdown behavior for small values of n like 5 or 10 or 100 rather than have some asymptotic slowdown! Make whatever reasonable assumptions you need to about the system. You can write a little C program or write MIPS code, whatever you like. Explain the reason(s) for the slowdown.
3. (1 point) How long did this take you, not counting the reading, and with whom did you work?