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for class on Thursday Sept. 19, 1996
Please read Sections 3.1 through 3.4 of the Patterson & Hennessy text, and be prepared to discuss the following issues:
1. The original Stanford MIPS architecture of the early 1980's used word addressing (sequential word addresses differ by 1) and did not have byte load and store instructions. This was motivated by empirical evidence from complex architectures that showed byte loads and stores to be quite rare; in the spirit of RISC, these rarely used instructions were omitted from the Stanford MIPS.
But when the architecture was commercialized, this choice was revisited. The commercial MIPS architecture uses byte addressing: a memory address refers to a unique byte in memory. Sequential 32-bit memory words therefore have addresses that differ by 4. The architecture includes load-byte and store-byte instructions, which reference a single byte anywhere in memory.
What factors might have contributed to this decision, do you think? Or, to put the question more generally: why should an architecture use byte addressing and byte loads and stores, when most memory accesses and most operations use 32-bit words? What would be the advantages and disadvantages of using word addressing instead of byte addressing in MIPS?
2. Byte addressing is pretty much the rule in contemporary RISC architectures. However, one of these architectures, the Digital Alpha, despite having byte addresses, did not originally have byte load and store instructions! In the original architecture, therefore, to get an arbitrary byte from memory into a register, you must load a word, and then shift and mask appropriately. Storing a byte--one instruction in MIPS--is a small nightmare: you must first load the word, insert the byte using various masks, shifts, and logical operations, and then store the word back.
What might have been the rationale for this curious arrangement? (Digital did in fact add byte instructions to the architecture in 1995.)