Computer Science 471:
Computer Architecture and Organization
Course Information--Fall 2000
Course Description
This course is an introduction to computer architecture and organization,
with a special focus on the principles underlying contemporary, mainstream,
uniprocessor design. It will explore the interaction of hardware and software,
and consider the efficient use of hardware to achieve high performance.
Topics will include the MIPS instruction-set architecture, computer arithmetic,
processor design, performance measurement and analysis, pipelining, caches
and virtual memory, input/output, and design tradeoffs among cost, performance,
and complexity.
Administrative matters
Instructor
Douglas Clark
309 C.S. Building, 258-6314
doug@cs
Office hours: just drop in, or make an appointment via email or phone
Teaching Assistants
Bo Brinkman
004 C.S. Building, 258-1785
brinkman@cs
Office hours: Fridays 11-12, or by appointment
Ting Liu
316 C.S. Building, 258-5386
tliu@cs
Office hours: Tuesdays 3-4, or by appointment
When and where
Tuesdays and Thursdays, 11:00-12:20, room 105 CS Building (small auditorium)
Prerequisites
Prerequisites for this course are COS 217, Introduction to Programming
Systems, and ELE 206/COS 306, Introduction to Logic Design.
Requirements
Class participation
This course uses a discussion, not lecture, format. Each class will cover
particular subjects from the assigned reading; particular issues for discussion
will be posed in a handout distributed the previous week (and usually available
on the course homepage). Students will be expected to have carefully read
the relevant assigned readings and to have prepared responses to, and analyses
of, any assigned discussion questions or topics. The quality and quantity
of student participation in class discussions is worth one-third of the
course grade. Participation grades will reflect the quality of the
student's analysis as well as the student's contribution to the process
of discussion: making connections with other students' remarks, raising
overlooked issues, asking good questions, making good summaries. Note that
effective participation requires a great deal more listening than
speaking, and in particular requires careful listening to other students,
and not just to the guy in the front.
Problem sets
Weekly problem sets, together worth one-third of the course grade, will
be assigned. Problem set questions will usually fall into two categories:
relatively straightforward questions that test understanding of text material,
and more open-ended questions that test a student's ability to apply and
extend this material. Many problems will involve hardware design at various
levels, some will involve program-writing, and some will involve quantitative
analysis of performance and cost. Questions will sometimes address material
not yet covered in class. Problem set solutions will be due on Mondays
by 5 PM, except that in the week after fall break and the week after Thanksgiving,
the problem set will be due by 5 PM Wednesday. No credit will be given
for late papers unless there are extraordinary circumstances and/or prior
arrangements. The first problem set will be due Monday Sept. 25, and there
will be no problem set due Oct. 23 (midterm week).
Policy on collaboration. Collaboration on problem sets is highly
encouraged, within reasonable, common-sense limits. Students are expected
to discuss problem set questions with other (current) students, and to
cooperate on solutions. Write-ups, however, should be done by individual
students, and the names of collaborators should appear on the paper. Please
see the instructor if you need somebody to collaborate with. Divide-and-conquer
may seem an efficient approach, but students should thoroughly
understand the solutions
they submit!
Examinations
A take-home, open-book midterm examination will be given during the week
before fall break. It will cover material presented and discussed in the
classes and assigned reading through Tuesday, Oct. 24. It will be worth
one-ninth of the course grade.
A take-home, open-book final examination will be given during the fall-term
exam period. It will cover all of the assigned readings and material presented
and discussed in class. It will be worth two-ninths of the course grade.
Policy on collaboration. Are you kidding? No collaboration on
take-home exams.
Final Project
There is no final project. There is no final project! The effort students might otherwise expect to expend on a project should instead be spread
out over the semester on careful class preparation (see above).
Reading
Textbook
David Patterson and John
Hennessy,
Computer
Organization and Design: The Hardware/Software Interface, 2nd
edition, Morgan Kaufmann Publishers, San Mateo, CA, 1997.
Other readings
Copies of any supplemental readings will be handed out in class.
Schedule
Introduction: Sept. 14
-
Topics: Introduction to the course; design of a simple processor
-
Reading: Patterson and Hennessy text, chapter 1
Review of Logic Design: Sept. 19
-
Topics: Combinational logic; state elements; clocks and timing;
memory elements; finite-state machines
-
Reading: Patterson & Hennessy, Appendix B
The MIPS Instruction-Set Architecture:
Sept. 21, 26
-
Topics: Introduction to MIPS architecture; encoding/representation
of instructions; memory addressing issues
-
Reading: Patt. & Henn., chapter 3
Arithmetic for Computers: Sept.
28, Oct. 3
-
Topics: Integer and logical operations; constructing a simple MIPS
ALU; floating point operations
-
Reading: P & H, chapter 4
MIPS Processor Design: Oct. 5,
10, 12, 17
-
Topics: MIPS datapath; implementing control; single-cycle processor
design; multiple-cycle processor design; microprogramming; exceptions
-
Reading: P & H, chapter 5
Processor Performance: Oct. 19,
24
-
Topics: defining and measuring computer performance; bad and good
metrics; benchmarks; Amdahl's Law; the Iron Law
-
Reading: P & H, chapter 2
TAKE-HOME MIDTERM given during week before fall recess
Pipelining: Oct. 26, fall recess, Nov. 7, 9, 14
-
Topics: the idea of pipelining; pipelined MIPS datapath; pipeline
control; hazards; stalls and bypassing; exceptions; performance of pipelined
systems
-
Reading: P & H, chapter 6
Memory Hierarchy: Nov. 16, 21, Thanksgiving recess, Nov. 28, 30
-
Topics: Caches and locality; virtual memory; translation lookaside
buffers; protection and page faults; performance tradeoffs in cache and
TLB design
-
Reading: P & H, chapter 7
Advanced MIPS Implementation: Dec. 5, 7
-
Topics: the R10000 design; out-of-order execution; register renaming;
branch prediction; memory reference disambiguation
-
Reading: Handout
Parallel Processors: Dec. 12, 14
-
Topics: SIMD and MIMD machines; MIMD interconnection choices; cache
coherency; performance; future possibilities
-
Reading: P & H, chapter 9
TAKE-HOME FINAL EXAM given during exam period
Doug Clark, 9/11/00