8
for class on Tuesday Oct. 10, 2000
Please read Sections 5.3 and C.2 of the Patterson & Hennessy text, and be prepared to discuss the following issue:
The control for the single-cycle MIPS datapath involves mapping bits from the opcode (always) and bits from the function field (sometimes) into control signals for the various multiplexors, the ALU, the memory, etc. The text presents this design in bits and pieces, focusing first on the control of the integer ALU, and then moving on to the other control signals.
During this class we will explore the text's control design and extend it to cover some instructions not in the subset used in this chapter. If you look closely at the text's scheme you will quickly see that it fails for many non-subset (and non-floating point) instructions: consider for example ori and jr. Think about how this control design might be unified into some single coherent structure that could be naturally extended to include the rest of the instructions. You should look at Appendix A, especially Figure A.19, as part of your preparation, and of course sketches of your hardware ideas will be helpful. Please avoid trickery such as doing arithmetic on the opcode! We're in search of a simple, extensible structure.